PCB Design Tutorial: Build Your First PCB in KiCad 9

This PCB design tutorial takes you from a blank KiCad 9 project to manufacturing-ready Gerbers and drill files: schematic → footprints → PCB layout → DRC → Gerbers/drills.

Tool: KiCad 9 • Output: Gerbers + drill files • Example: ESP32 power + analog front‑end board

Contents

What you’ll build

In this tutorial we design a simple two‑layer PCB that provides power and an analog front end for an ESP32 DevKitC board. The workflow is intentionally “end‑to‑end” so you can reuse it for your own designs.

Tip: If you’re building your first PCB, keep it two layers and validate early with ERC/DRC at each milestone.

What you need

1) Create a KiCad project

  1. Open KiCad Project Manager File → New Project .
  2. Choose a project name and folder. KiCad creates:
    • .kicad_pro (project)
    • .kicad_sch (schematic)
    • .kicad_pcb (PCB layout)
  3. (Optional) Configure backups: Preferences → Common Settings .

2) Schematic setup (page settings + net classes)

Update the title block

Good documentation pays off later (traceability, revisions, manufacturing handoff). In the Schematic Editor: File → Page Settings , then fill in title, company, author, version, date, and comments.

Define net classes using trace‑width calculations

Net classes define rules like track width and clearance. Before setting them, use Tools → Calculator Tools → Track Width to size your power net conservatively. In the video example (0.5 A, 1 oz copper / 35 µm), the calculator suggests ~5 mil minimum; we round up to 10 mil .

Then in the Schematic Editor: File → Schematic Setup → Net Classes . Keep the Default class for signals and add:

3) Place symbols and add external libraries

Use Place → Place Symbols to insert parts (connectors, TVS, resistors/caps, transformer, etc.). If a symbol/footprint isn’t in the default library, install it as a library.

Add an ESP32 DevKitC symbol + footprint

  1. Download the part from SnapEDA/SnapMagic and unzip it.
  2. Project Manager → Preferences → Manage Symbol Libraries → add the .kicad_sym .
  3. Project Manager → Preferences → Manage Footprint Libraries → add the same folder for footprints.

Tip: Prefer version‑controlled, project‑local libraries for tutorials and client work to keep builds reproducible.

4) Wiring + ERC (and fixing PWR errors)

Draw connections with Place → Draw Wires . Add power symbols via Place → Power Symbols . Then assign nets to your net classes in Schematic Setup → Net Classes → Netclass Assignments .

Run ERC

Run Inspect → Electrical Rules Checker (ERC) . In the example, unused ESP32 pins flag errors (expected for a tutorial), but +5V and GND can also error because KiCad doesn’t “see” a power source.

Fix that by placing PWR_FLAG symbols on the externally powered nets (+5V and GND).

5) Assign footprints (and make a custom one)

Open Tools → Assign Footprints . Select a symbol in the center list, then double‑click a footprint on the right. Use the search bar to quickly find footprints by name.

Inspect footprints before committing

Create a custom footprint (when no library part exists)

  1. Open the Footprint Editor from the Project Manager or toolbar.
  2. Copy a similar footprint: right‑click → Save As , then edit the copy.
  3. Adjust pad/drill sizes and renumber pads to match the schematic pin numbers.

6) Generate a BOM

KiCad’s BOM generator, Tools → Generate Bill of Materials, groups identical parts (value, part number, footprint) into single lines with quantities. Use the Export tab to output CSV for spreadsheets.

Tip: Add fields like manufacturer part number and datasheet URL early—future you (and your assembler) will thank you.

7) PCB import + board setup + placement

  1. Open the PCB Editor: Tools → Switch to PCB Editor .
  2. Import changes: Tools → Update PCB from Schematic (defaults are fine).
  3. Open File → Board Setup to configure layers, rules, and net classes (many transfer from the schematic).

Turn on ratsnest visibility (right‑hand Appearance panel) to see required connections. Place larger/mechanical parts first (connectors, transformer), then refine for shorter routes and better EMC.

8) Routing + ground plane + mechanics

Ground plane on the bottom layer

To reduce loop area and improve EMC, pour a solid GND plane on the bottom layer: Draw Filled Zone → select B.Cu and assign the zone to GND . Close the polygon (right‑click → Close Polygon), then hit the B key to fill the polygon.

Route on the top layer

Route signals/power on the top layer and let the plane provide clean return paths. Keep high‑current loops tight and sensitive analog sections away from antennas/RF.

If your PCB has only two layers and one of them is a ground plane, crossing traces on the top layer with vias can be difficult. In this situation, you can draw a filled zone (CTRL + SHIFT + Z) on the ground layer to create a small 'island' in the ground plane that allows the trace to pass. After creating the 'island', press B to refill the zones. KiCad will then apply the required clearance between the ground plane and the signal island according to your Net Class settings.
However, make sure this modification does not enlarge return-current loops, as that can negatively affect EMC performance.

Mounting holes, silkscreen logo, and board outline

9) 3D viewer + models

Assign 3D models in Footprint Properties → 3D Models (scale/rotation/offset as needed), then open View → 3D Viewer to inspect the assembled board.

RF note: If you use an ESP32 dev board with an antenna section, keep it clear of copper/metal and away from noisy analog areas.

10) DRC (design‑rule check)

Before fabrication, run Inspect → Design Rules Checker (DRC) . Fix issues like silkscreen overlap, clearance violations, and unconnected items.

11) Gerbers + drill files

  1. File → Fabrication Outputs → Gerbers .
  2. Select required layers (copper, mask, silkscreen, edge cuts), then click Plot .
  3. Click Generate Drill Files and save into the same Gerbers/ folder.
  4. Inspect outputs in Gerber Viewer before sending to your manufacturer.

12) Design‑review checklist

PCB issues often come from avoidable mistakes (EMI, poor return paths, clearance, manufacturability, thermal limits, test access). Use a checklist before ordering boards to reduce surprises.

Recommended: PCB Design Rules – Checklist (includes a downloadable review sheet).

Resources

FAQ

Why does ERC complain about +5V and GND?

If your board is powered externally (e.g., via a screw terminal), KiCad may not detect a “power output” driving the net. Add a PWR_FLAG to +5V and GND to tell ERC the net is intentionally powered.

Should I always use a ground plane?

For most digital/MCU boards, a solid ground plane reduces loop area and noise. It also makes routing easier and improves return paths. Validate clearances and keep‑outs (especially near antennas) with DRC.

What should I inspect before ordering PCBs?

At minimum: outline (Edge.Cuts), hole sizes, solder mask openings, silkscreen readability, creepage/clearance, thermal relief settings, and that all nets are connected. Always open the Gerbers in a viewer before uploading them to a manufacturer.
It's strongly recommended to run a final design review using a checklist, such as the JAK Services PCB Design Rules – Checklist, to catch manufacturability, EMI, assembly issues and other that DRC alone won’t flag.